7400 series integrated circuits included in Altera Quartus II library '/others/maxplus2/'

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74 code Maxplus2
names		 Name of circuit Original datasheets
of 7400 series IC
42 7442 BCD to decimal decoder 74LS42.pdf , sn_7442.pdf
43 7443 excess-3 to decimal decoder
44 7444 excess-3-Gray code to decimal decoder
45 7445 BCD to decimal decoder/driver sn_7445.pdf
46 7446 BCD to seven-segment display decoder/driver with 30 v open collector outputs 7446.pdf , 74LS46.pdf
47 7447 BCD to 7-segment decoder/driver with 15 v open collector outputs sn_7447a.pdf
48 7448 BCD to 7-segment decoder/driver with Internal Pullups 74LS48.pdf , sn_7448.pdf
49 7449 BCD to 7-segment decoder/driver with open collector outputs sn_7449.pdf
56 7456 50:1 frequency divider 74LS56P.pdf , sn_7456.pdf
57 7457 60:1 frequency divider 74LS57P.pdf
68 7468 dual 4 bit decade counters 74LS68.pdf , sn_7468.pdf
69 7469 dual 4 bit binary counters 74LS69.pdf
80 7480 gated full adder
82 7482 2-bit binary full adder
83 7483 4-bit binary full adder 74LS83.pdf , sn_7483a.pdf
85 7485 4-bit magnitude comparator 74LS85.pdf , sn_7485.pdf
91 7491 8-bit shift register, serial In, serial out, gated input 74LS91.pdf , sn_7491.pdf
94 7494 4-bit shift register, dual asynchronous presets
95 7495 4-bit shift register, parallel In, parallel out, serial input 74LS95B.pdf , sn_7495a.pdf
96 7496 5-bit parallel-In/parallel-out shift register, asynchronous preset sn_7496.pdf
97 7497 synchronous 6-bit binary rate multiplier sn_7497.pdf
98 7498 4-bit data selector/storage register
99 7499 4-bit bidirectional universal shift register
116 74116
74116o 		dual 4-bit latch with clear
137 74137 3 to 8-line decoder/demultiplexer with address latch 74LS137.pdf , sn_74137.pdf
138 74138 3 to 8-line decoder/demultiplexer 74LS138.pdf , sn_74138.pdf
139 74139
74139m
74139o 		dual 2 to 4-line decoder/demultiplexer 74LS139A.pdf , sn_74139.pdf
143 74143 decade counter/latch/decoder/7-segment driver, 15 ma constant current
145 74145 BCD to decimal decoder/driver 74LS145.pdf
147 74147 10-line to 4-line priority encoder 74LS147.pdf , sn_74147.pdf
148 74148 8-line to 3-line priority encoder 74LS148.pdf
151 74151
74151b 		8-line to 1-line data selector/multiplexer 74LS151.pdf
153 74153
74153m
74153o 		dual 4-line to 1-line data selector/multiplexer 74LS153.pdf , sn_74153.pdf
154 74154 4-line to 16-line decoder/demultiplexer 74LS154.pdf , sn_74154.pdf
155 74155
74155o 		dual 2-line to 4-line decoder/demultiplexer 74LS155A.pdf , sn_74155.pdf
156 74156 dual 2-line to 4-line decoder/demultiplexer with open collector outputs 74LS156.pdf
157 74157
74157m
74157o 		quad 2-line to 1-line data selector/multiplexer, noninverting 74LS157.pdf , dm74157.pdf , sn_74157.pdf
158 74158
74158o 		quad 2-line to 1-line data selector/multiplexer, inverting 74LS158.pdf
160 74160 synchronous 4-bit decade counter with asynchronous clear 74LS160A.pdf , sn_74160.pdf
161 74161 synchronous 4-bit binary counter with asynchronous clear sn_74161a.pdf
162 74162 synchronous 4-bit decade counter with synchronous clear 74162.pdf
163 74163 synchronous 4-bit binary counter with synchronous clear
164 74164
74164b 		8-bit parallel-out serial shift register with asynchronous clear 74LS164.pdf , sn_74164.pdf
165 74165
74165b 		8-bit serial shift register, parallel Load, complementary outputs sn_74165.pdf
166 74166 parallel-Load 8-bit shift register 74LS166A.pdf , sn_74166.pdf
167 74167 synchronous decade rate multiplier
168 74168 synchronous 4-bit up/down decade counter sn_74168.pdf
169 74169 synchronous 4-bit up/down binary counter 74LS169A.pdf
172 74172 16-bit multiple port register file with three-state outputs
174 74174
74174b
74174m 		hex d flip-flop with common clear sn_74174.pdf
175 74175 quad d edge-triggered flip-flop with complementary outputs and asynchronous clear 74LS175.pdf , sn_74175.pdf
176 74176 presettable decade (bi-quinary) counter/latch sn_74176.pdf
177 74177 presettable binary counter/latch
178 74178 4-bit parallel-access shift register
179 74179 4-bit parallel-access shift register with asynchronous clear and complementary Qd outputs
180 74180
74180b 		9-bit odd/even parity bit generator and checker sn_74180.pdf
181 74181 4-bit arithmetic logic unit and function generator sn_74181.pdf
182 74182 lookahead carry generator
183 74183
74183o 		dual carry-save full adder
184 74184 BCD to binary converter DM74184_74185
185 74185 6-bit binary to BCD converter DM74184_74185
190 74190 synchronous up/down decade counter 74LS190.pdf , sn_74190.pdf
191 74191 synchronous up/down binary counter 74LS191.pdf
192 74192 synchronous up/down decade counter with clear sn_74192.pdf
193 74193 synchronous up/down binary counter with clear 74LS193.pdf , dm74LS193.pdf
194 74194 4-bit bidirectional universal shift register sn_74194.pdf
195 74195 4-bit parallel-access shift register sn_74195a.pdf
196 74196 presettable decade counter/latch sn_74196.pdf
197 74197 presettable binary counter/latch
198 74198 8-bit bidirectional universal shift register sn_74198.pdf
199 74199 8-bit bidirectional universal shift register with J-Not-K serial inputs
240 74240
74240b
74240o 		octal buffer with Inverted three-state outputs 74LS240.pdf , sn_74240.pdf
241 74241
74241b 		octal buffer with noninverted three-state outputs sn_74241.pdf
244 74244
74244b 		octal buffer with noninverted three-state outputs 74LS244.pdf , sn_74244.pdf
246 74246 BCD to 7-segment decoder/driver with 30 v open collector outputs
247 74247 BCD to 7-segment decoder/driver with 15 v open collector outputs sn_74247.pdf
248 74248 BCD to 7-segment decoder/driver with Internal Pull-up outputs
251 74251 8-line to 1-line data selector/multiplexer with complementary three-state outputs sn_74251.pdf
253 74253 dual 4-line to 1-line data selector/multiplexer with three-state outputs
257 74257 quad 2-line to 1-line data selector/multiplexer with noninverted three-state outputs sn_74257.pdf
258 74258 quad 2-line to 1-line data selector/multiplexer with Inverted three-state outputs
259 74259 8-bit addressable latch 74LS259.pdf , sn_74259.pdf
261 74261 2-bit by 4-bit parallel binary multiplier
265 74265 quad complementary output elements
273 74273
74273b 		8-bit register with reset 74LS273.pdf , sn_74273.pdf
278 74278 4-bit cascadeable priority registers with latched data inputs
280 74280
74280b 		9-bit odd/even Parity bit Generator/checker sn_74280.pdf
283 74283 4-bit binary Full adder 74LS283.pdf , sn_74283.pdf
284 74284 4-bit by 4-bit parallel binary multiplier (low order 4 bits of product)
285 74285 4-bit by 4-bit parallel binary multiplier (high order 4 bits of product)
290 74290 decade counter (separate divide-by-2 and divide-by-5 sections) sn_74290.pdf
292 74292 programmable frequency divider/digital timer
293 74293 4-bit binary counter (separate divide-by-2 and divide-by-8 sections)
294 74294 programmable frequency divider/digital timer
295 74295 4-bit bidirectional register with three-state outputs
297 74297 digital phase-locked-loop filter
298 74298 quad 2-input multiplexer with storage sn_74298.pdf
299 74299 8-bit bidirectional universal shift/storage register with three-state outputs sn_74299.pdf
348 74348 8 to 3-line priority encoder with three-state outputs
350 74350 4-bit shifter with three-state outputs
352 74352
74352o 		dual 4-line to 1-line data selectors/multiplexers with inverting outputs
353 74353 dual 4-line to 1-line data selectors/multiplexers with inverting three-state outputs sn_74353.pdf
354 74354 8 to 1-line data selector/multiplexer with transparent latch, three-state outputs
356 74356 8 to 1-line data selector/multiplexer with edge-triggered register, three-state outputs
365 74365 hex buffer with noninverted three-state outputs
366 74366 hex buffer with Inverted three-state outputs
367 74367 hex buffer with noninverted three-state outputs
368 74368 hex buffer with Inverted three-state outputs
373 74373
74373b
74373m 		octal transparent latch with three-state outputs 74LS373.pdf
374 74374
74374b
74374m
74374nt 		octal register with three-state outputs
375 74375 quad bistable latch
377 74377
74377b 		8-bit register with clock enable
378 74378 6-bit register with clock enable
379 74379 4-bit register with clock enable and complementary outputs
381 74381 4-bit arithmetic logic unit/function generator with generate and propagate outputs
382 74382 4-bit arithmetic logic unit/function generator with ripple carry and overflow outputs
385 74385 quad 4-bit adder/subtractor
390 74390
74390o 		dual 4-bit decade counter
393 74393
74393m 		dual 4-bit binary counter
395 74395 4-bit universal shift register with three-state outputs
398 74398 quad 2-input mulitplexers with storage and complementary outputs
399 74399 quad 2-input multiplexer with storage
465 74465 octal buffer with three-state outputs
468 74468 dual mos-to-ttL level converter
490 74490
74490o 		dual decade counter
540 74540 inverting octal buffer with three-state outputs
541 74541 non-inverting octal buffer with three-state outputs
568 74568 decade up/down counter with three-state outputs
569 74569 binary up/down counter with three-state outputs
589 74589 8-bit shift register with input latch, three-state outputs
590 74590 8-bit binary counter with output registers and three-state outputs
592 74592 8-bit binary counter with input registers
594 74594 serial-in shift register with output registers
595 74595 serial-in shift register with output latches
597 74597 serial-out shift register with input latches
604 74604 octal 2-input multiplexer with latch, high-speed, with three-state outputs
630 74630 16-bit error detection and correction (EDAC) with three-state outputs
668 74668 synchronous 4-bit decade Up/down counter sn_74668.pdf
669 74669 synchronous 4-bit binary Up/down counter
670 74670 4 by 4 register File with three-state outputs
671 74671 4-bit bidirectional shift register/latch /multiplexer with three-state outputs
672 74672 4-bit bidirectional shift register/latch/multiplexer with three-state outputs
673 74673 16-bit serial-in serial-out shift register with output storage registers, three-state outputs
674 74674 16-bit parallel-in serial-out shift register with three-state outputs
684 74684 8-bit magnitude comparator
686 74686 8-bit magnitude comparator with enable
688 74688 8-bit equality comparator 74LS688.pdf , sn_74688.pdf
690 74690 three state outputs
691 74691 4-bit binary counter/latch/multiplexer with asynchronous reset, three-state outputs
693 74693 4-bit binary counter/latch/multiplexer with synchronous reset, three-state outputs
696 74696 4-bit decimal counter/register/multiplexer with asynchronous reset, three-state outputs
697 74697 4-bit binary counter/register/multiplexer with asynchronous reset, three-state outputs
698 74698 4-bit decimal counter/register/multiplexer with synchronous reset, three-state outputs
699 74699 4-bit binary counter/register/multiplexer with synchronous reset, three-state outputs

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